The present invention relates generally to data processing systems, and more particularly, to a data processing system with an on-chip debug FIFO capable of storing change-of-flow addresses, data values, or current instruction addresses.
In previous microcontrollers, program debugging was primarily based on in-circuit emulators and logic analyzers which relied on access to address and data signals on external pins. In older microcontroller systems it was possible to collect debug information by monitoring address, data, and control signals with external equipment such as a logic analyzer or a bus state analyzer. With modem advances in silicon processing technology, the silicon area and cost of bonding pads for external pins has risen dramatically relative to the cost of internal logic. It is now desirable to produce microcontroller integrated circuits which do not have external pins for address and data signals, but this presents a problem for product development and program debugging.